Fan-out Chip Scale Packaging technologies are being promoted as a key element of next generation 3D semiconductor packaging schemes. Freescale’s Redistribution Chip Package (RCP) and Infineon’s Embedded Wafer Level BGA (EWLB) are two examples that have recently been receiving significant industry attention. Additionally, embedding integrated circuits and passive components into printed circuit boards (PCB) for cellular, consumer and other form factor sensitive portable electronics applications is also emerging. In the case of the PCB approach, viable approaches by Imbera and Europe’s Hiding Dies consortia have also emerged.
One of the critical infrastructural requirements for the proliferation of these emerging 3D technologies is the availability of a robust, standardized wafer level die modification technology needed to prepare devices for embedding. FCI’s assortment of Pad on I/O - EDC and multilayer RDL-EDC technologies were originally developed by FCI to support flip chip and WLCSP applications but have been modified to address the specific requirements of embedded die technologies. Embeddable Die Customization (EDC™) is the product name for this recent addition to FCI’s broadening portfolio of wafer level technologies. EDC™ allows the conversion of integrated circuits into embeddable ready components. Wafer thinning and stress relief processing to enable die thicknesses of 100 microns and below is also a key requirement of the EDC™ technology.
A broadening range of embedded die applications are currently being supported by FCI’s EDC offering. Through its network of established embedded die technology partners, FCI can facilitate your transition into 3D packaging.
In 2005, FlipChip acquired a license from the Fraunhofer/IZM Institute of Berlin to offer Electroless Ni/Au (E-less Ni/Au) bumping alternatives. E-less Ni/Au is available in three configurations: EliteUBM, EliteFC, and EliteCSP. EliteUBM is simply a Ni/Au pad ranging in thickness from 5μm to 30μm. Typical applications for EliteUBM are low cost RFID tags. Elite packages and FlipChip package extensions are JEDEC Level 1 compliant.
Devices that are to be bumped using any of the Elite processes need to have some special requirements met. These requirements are described in Section 4.3.12 of the Design Guide.
EliteUBM™ – Process Flow