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UltraCSP®
UltraCSP® is our patented Wafer Level Chip Scale Package (or WLCSP) process. Since its introduction in 1998, UltraCSP has become the industry standard for WLCSP. Bump heights for the process range from 200µm to 450µm. In this process, pre-formed solder balls of 250µm to 500µm are placed on the wafer and reflowed. The bumps can be placed directly on the device I/O's or the signal may be redistributed to a more desirable die location. Typically, the number of bumps per die is 4-100. Die bumped with UltraCSP do not require underfill until the bump array reaches the 6x6 to 7x7 size. Then Polymer Collar WLP™ or underfill may be needed. The lack of underfill makes it easy to migrate TSOP or QFP to UltraCSP. UltraCSP is classified as JEDEC Level 1 compliant. For die that need even higher solder joint reliability, take a look at the Polymer Collar WLP™ enhancement to UltraCSP. The UltraCSP process may be used to bump directly on I/O or may be used to redistribute bumps to a more desirable die location. |
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